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Wafer dicing also pays attention to environmental protection.

TSMC released the latest ESG e-newsletter, pointing out that through cooperation with GlobalWafers, it has researched the application of slurry-free cutting technology in the wafer dicing process, replacing the use of silicon carbide (SiC) slurry. In May of this year, it was introduced to Wafer Fab 5 and Wafer Fab 6. It is expected that after Wafer Fab 3, Wafer Fab 8, and Wafer Fab 10 complete the verification and introduction, the annual total reduction of SiC slurry usage will be about 6,000 kilograms, and carbon reduction will be 294 tons.

TSMC has long adhered to the ESG vision of "enhancing society", encouraging employees to propose good ideas that link to the company's five major ESG directions through the TSMC ESG AWARD, injecting sustainable energy into daily operations. The third TSMC ESG AWARD-winning proposal "Diamond Cutting Lasts Forever, Green Manufacturing Lasts Forever" was launched in 2022, working with suppliers to successfully use "slurry-free cutting technology (Diamond Cutting Wire, DCW)" to cut 8-inch silicon wafers without affecting the quality of the original process.

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TSMC said that the traditional wafer dicing process is to cut the silicon ingot into silicon segments, and then cut it into silicon wafers with copper wire and SiC slurry. Because the production and recycling process of SiC slurry is difficult to reduce carbon footprint, in order to promote environmental sustainability and deepen green operations, TSMC has cooperated with suppliers to invest in the research of slurry-free cutting technology applied to the wafer dicing process. Using a steel wire inlaid with diamonds and water for cutting, it can replace the use of SiC slurry and greatly reduce its production and recycling process by more than 90% carbon emissions.

In addition, to ensure the quality of subsequent production, TSMC not only confirms the supplier's raw material quality assurance certificate (CoA) but also assists them in testing production at their own 8-inch wafer factory. Through verification and repeated adjustments, it ensures that the flatness of the silicon wafer meets the requirements of the semiconductor process, taking into account both quality and a friendly environment.

Chen Mingde, head of TSMC's Advanced Analysis and Materials Center, pointed out that the company adheres to the vision of sustainable development, works with suppliers to achieve a friendly environment for silicon wafer manufacturing, and jointly creates a green low-carbon supply chain.

Xue Yinsheng, General Manager of GlobalWafers Zhongde Branch, said that as a part of the semiconductor value chain, in addition to striving to reduce the environmental impact of the production process, developing environmentally friendly processes and achieving carbon reduction and waste reduction effects are also important keys to promoting sustainable development.TSMC, in its effort to expand green benefits, has not only introduced 8-inch silicon wafers produced by slurry-free cutting technology but also continues to collaborate with suppliers to evaluate the application of 12-inch silicon wafer cutting. It is expected that by the end of 2024, after assisting suppliers in completing the installation of 12-inch silicon wafer slurry-free cutting machines, verification will be carried out. It is anticipated that once fully implemented, the annual reduction in SiC slurry usage could reach approximately 130 metric tons, and carbon emissions could be reduced by 5450 metric tons.

Wafer Dicing

Wafer dicing is the process in semiconductor device manufacturing where bare dies are separated from the finished semiconductor wafer. Dicing involves scribing, breaking, mechanical sawing, or laser cutting, and the cutting methods are typically automated to ensure precision and accuracy. After dicing, individual silicon chips can be packaged into chip carriers for use in constructing electronic devices, such as computers.

During the dicing process, the wafer is usually mounted on a dicing tape with an adhesive backing that secures the wafer onto a thin metal frame. Depending on the dicing application, the dicing tape has different characteristics. UV-curable tape is used for smaller sizes, while non-UV dicing tape is used for larger chip sizes. A scribing saw can use a diamond-impregnated scribing blade that rotates at 30,000 rpm and is cooled with deionized water. Once the wafer is diced, the pieces left on the tape are referred to as bare dies. Each will be packaged in an appropriate enclosure or placed directly on a printed circuit board substrate as "bare chips." The cut-away area is called the scribe street, typically about 75 µm wide. After the wafer is diced, the chips will remain on the dicing tape until they are picked up by chip processing equipment (such as a chip bonder or chip sorter) during the electronic assembly process.

Standard semiconductor manufacturing uses a "backside grinding before dicing" method, where the wafer is thinned before dicing. The wafer undergoes a process called backside grinding before dicing.

The size of the chips left on the tape can range from 35 mm on one side (very large) to 0.1 mm (very small). The created dies can be any shape generated by straight lines, usually rectangular or square. In some cases, they can also be other shapes, depending on the dicing method used. Full-cut laser dicing machines can cut and separate various shapes.

The materials cut include glass, aluminum oxide, silicon, gallium arsenide (GaAs), silicon on sapphire (SoS), ceramics, and precision compound semiconductors.

Silicon wafer dicing can also be performed using laser-based technology, known as the stealth dicing process. It is a two-stage process that first introduces a defect area into the wafer by scanning the beam along the predetermined cutting line, then expands the carrier film beneath to induce fracture.

The first step uses a pulsed Nd:YAG laser with a wavelength of 1064 nm, well adapted to the electronic bandgap of silicon (1117 nm), thus allowing maximum absorption through optical focusing. The defect area, about 10 µm wide, is inscribed along the intended cutting channel through multiple scans of the laser, with the beam focused at different depths of the wafer. A single laser pulse results in a defect crystal area shaped like a candle flame. This shape is caused by the rapid melting and solidification of the illuminated area in the focus of the laser beam, where only a small volume on the order of a few cubic micrometers suddenly rises to about 1000 K in nanoseconds and then drops back to ambient temperature. The laser's pulse frequency is typically about 100 kHz, and the chip moves at a speed of about 1 m/s. The defect area, about 10 µm wide, is ultimately inscribed on the wafer, causing preferential fracture along the wafer under mechanical load. Fracture occurs in the second step and is carried out by radially expanding the carrier film to which the chip is attached. The cleavage starts from the bottom and progresses to the surface, so a high distortion density must be introduced at the bottom.

The advantage of the stealth dicing process is that it does not require coolant. Dry cutting methods must inevitably be applied to the preparation of some micro-electromechanical systems, especially when these systems are used for bioelectronics. In addition, stealth dicing produces almost no debris, and due to the smaller kerf loss compared to wafer saws, it can improve the utilization of the wafer surface. After this step, chip grinding can be performed to reduce the thickness of the chips.